In this job you will drive the development, testing and maintaining of state-of-the-art IC-package co-design tool and flow.
You will be working within the department of Design Enablement Engineering Support and in close collaboration with RF-EM Design Enablement department in NXP CTO.
The work is performed in close co-operation with the back-end design team, package innovation team, other design enablement departments, business line designers and architects, and leading EDA vendors.
Responsibilities:
Build the Analog & RF IC design flow across NXP which has to be combined with package flow, creating a combined design flow for IC & package design.
Collect the requirements and specifications for co-design flow of IC, Package (and eventually PCB) in close cooperation with the design teams.
Create a flow that unify the entire design fabrics (IC, Package, and PCB) into a common design environment with well-known EDA tools.
Propose recommendation for flow optimization and characterization of the designs under development.
Manage the tool & flow verification and regression testing in an efficient way towards automation.
Provide guidelines and recommendations to the design team on how to use of newly developed flows.
Cooperate with EDA vendors (bugfixes, enhancement requests, etc.) in sync with the design and package innovation teams.
Align co-design flow with flows and methodologies that will be used for electromagnetic simulations,
Document findings in a form of technical reports and provide recommendations to the design teams.
Contribute to the overall improvement of the existing design flows and methodologies.
Additionally, you can also contribute to the following activities:
Develop / maintain a broad knowledge of technical developments in the IC design domain.
Provide first-line and expert support for co-design of die, package & PCB to the design community.
Contribute to improvements in next-generation RF designs (Radar, 6G, Radio, …).
Qualification:
Master’s degree in Electronics engineering, Electrical Engineering, Applied Physics and/or an equivalent proficiency.
Experience: 8+ years
Strong background on Analog & RF IC design flow is must, experience in die digital design flow (i.e Innovus) is a plus.
Advanced industrial experience in Analog and RF domain (die, package and PCB) is recommended, especially knowledge of Cadence Virtuoso for IC designs and Cadence Allegro for package and PCB designs is highly recommended.
Expert user of Cadence (Virtuoso RF, Allegro), Ansys-HFSS, ADS-RFPro is a plus.
knowledge of Electromagnetic 2.5 / 3D simulations, specifically with available commercial tools is plus.
Knowledge with programming languages in a plus.
Excellent communication skills and team player.
Proficient in communicating and writing technical documentation in English.
